Some of the people we meet question the methodology we use to support the innovation process of companies.
We are convinced that even the most technical industries can benefit from hands-on innovation methodologies. Let us give you some examples from the micro-electronics industry.
Micro-electronic devices have witnessed a vast evolution from bulky slow devices to the compact, user-friendly, fast and ever-connected devices we use almost continuously throughout the day. This impressively fast maturing of the technology is intrinsically linked to aggressive downscaling of feature sizes and elegant innovative steps in the field of CMOS technology as illustrated.
The building blocks of CMOS technology are tiny transistors and basically consist of a source, a gate and a drain. When a voltage is applied on the gate, a current (i.e. a digital “1”) can be transferred. Combining millions of these transistor building blocks in an integrated circuit allows to build logic devices (e.g. processors) or digital memory (e.g. flash). To improve the workings of such chips one needs to get more & smaller building blocks on a smaller surface. Evidently, this poses major engineering challenges.
At CREAX we describe products or technologies as a combination of unique properties. When varying these properties in a systematic way we discover pathways for innovation. Although extremely simple, the principle as such still holds, even when applied to complex technologies.
Solid to multi-porous
Due to aggressive downscaling of the dimensions, the insulating interspace between the conducting parts is thinned to the point where parasitic capacitance between the interconnects induces charge build-up and cross-talk, significantly degrading device performance. To this end, researchers have improved the insulating medium by adding porosity in the interspace. As such, the integration of voids enabled a further reduction in dielectric constant of the material compared to the initial solid insulation.
2D to 3D
Faster switching of transistors requires increased precision in control over the gate. A few years back, CMOS technology relied on planar gates, having limited interface for control. However, the introduction of finFETs and the later gate-all-around technology heralded a major breakthrough. The gate control was significantly enhanced by wrapping the gate around the channel, and hence achieving a major increase in interface by moving from 2D to 3D
Physical contact to field
Non-volatile solid-state memory is currently perceived as the main driver, boosting CMOS technology. This is mainly related to the innovative implementation of a floating gate. Whereas in previous designs all gates were physically connected by interconnects to a power supply, floating gates are entirely surrounded by insulation, allowing them to maintain their charge – and hence their digital information – when power is switched off. This implies that the gate can no longer be switched on by providing charge via conduction, but requires field induced charging of the floating gate.
To conclude, even when a technology is best described in the language of quantum physics, basic methodologies as embraced by the CREAX team still hold to boost innovation.
Tell us how complex your problem or technology is and challenge us to discover unexplored routes to innovation.